During the manufacture of semiconductor devices such as random access memories, microprocessors, and other devices formed using a silicon water substrate assembly or other semiconductive wafer substrate assemblies, a thick field oxide layer is typically formed for use as an isolation structure. To form field oxide an oxidation-resistant layer such as silicon nitride is patterned over the wafer assembly which leaves portions of the wafer exposed. The exposed areas are subjected to heat and moisture, usually for a relatively long period of time, to form a field oxide layer typically at least 5000 .ANG. thick.
One problem which can occur with the process described above is field oxide thinning which results from forming field oxide in exposed wafer areas having different widths. The field oxide tends to form thinner in narrow areas and thicker in wider areas. A process which has been used to decrease field oxide thinning is polycrystalline silicon (poly) assisted field oxide formation as discussed in U.S. Pat. No. 5,438,016, issued Aug. 1, 1995, which is incorporated herein by reference. With this process, a poly layer is formed in a trench at the narrower areas of the wafer while at the wider areas the poly is removed. As poly oxidizes faster than the silicon wafer, the field oxide forms more quickly in the narrow areas thereby decreasing the difference in thickness between the wide areas and the narrow areas.
With increasing device density field oxide formation is known to stress the semiconductor wafer which affects the electrical properties and the manufacturability of a semiconductor device. As silicon oxidizes to form field oxide, the silicon dioxide formed has a volume of about two times the volume of the preoxidized silicon due to the addition of oxygen atoms. Thus as the field oxide forms it can exert pressure on the wafer and create stress regions within the wafer which can adversely affect the electrical properties of a device formed from the wafer and can physically damage the wafer. A process for oxide formation which imparts less stress to the wafer and reduces field oxide thinning in narrow regions would be desirable.